+918309818310

admin@chipxpert.in

PD RECORDING SESSIONS

Created by

ChipXpert Admin

18:26:38 Hours

1 Enrolled

(0 Reviews)

English

Last updated

Tue, 07-Apr-2026

Course description

What will i learn?

Requirements

S1 INTRODUCTION OF SYNTHESIS
00:19:26
S2 RTL FILE AND NETLIST FILE
00:24:53
S3 CELL LEF AND MACRO LEF FILE
00:19:06
S4 netlist file and sdc
00:36:32
S5 TECHNOLOGY LEF
00:24:43
S6 TIMING LIBRARY
00:44:05
S7 upf file deatiled explaination
00:44:05
S8 DEF FILE DETAILED EXPLAINATION
00:36:39
S9 SPEF FILE DETAILED EXPLAINATION
00:23:29
S10 LVF FILE DETAILED EXPLAINATION
00:33:44
S11 MMMC FILE DETAILED EXPLAINATION
00:36:52
S12 WHY WE USING GET DB AND SET DB ,SOURCE COMMANDS
00:09:58
S13 CLOCK DEFINITION AND UNCERTAINTY
00:23:35
S14 SETUP TIMING AND HOLD TIMING ,SOURCE LATENCY AND NETWORK LATENCY
00:25:02
S15 CLOCK GROUPS AND MCP , FALSE PATH , DRVS
00:34:14
S16 ELABORATE STAGE IN SYNTHESIS
00:42:24
S17 sanity checks
00:43:17
S18 syn generic stage
00:28:11
S19 syn map & syn optimization
00:40:09
S21 SYNTHESIS PRATICAL 1 DTOP BLOCK
00:40:32
S22 SYNTHESIS PRATICAL 2 DTOP BLOCK
00:28:02
S23 SYNTHESIS PRATICAL 3
00:35:55
S24 SYNTHESIS PRATICAL EXPLAINATION DONE BASED ON REPORTS POWER AREA TIMING
00:34:51
S25 PNR INTRO
00:21:21
S26 FLOORPLAN CORE SIZE AND DIE SIZE ESTIMATION BASED REPORT AREA ETC
00:28:35
S27 FLOORPLAN GIUDELINES
00:21:03
S28 PLACEMENT AND ROUTING BLOCKAGES AND PHYSICAL CELLS
00:29:56
S29 POWERPLAN INTRO AND OBJECTIVES ,PDN,RINGS AND STRIPES CALCUCLATION BASED ON POWER REPORT DTOP 7
00:31:48
S30 IRDROP AND EM ISSUES AND PREVENTION TECHNIQUES
00:34:52
S31 LOW POWER TECHNIQUES
00:28:16
S32 PLACEMENT AND STAGES BASED GLOBAL AND LEGALIZATION ,DETAILED
00:28:38
S33 SCAN CHAIN REORDERING AND HFNS IN PLACEMENT OPTIMIZATION
00:24:34
S36 CLOCK TREE ALGORTHIMS IN CTS STAGE
00:26:11
S37 CTS EXCEPTIONS
00:31:16
S38 CROSSTALK IN CTS STAGE
00:22:40
S39 OCV AND HOW DERATES IMPACTS ON SETUP AND HOLD TIMINGS
00:30:20
S40 ROUTING STAGES
00:17:24

ChipXpert Admin

View profile Follow

₹90000

Lectures

37

Skill level

Beginner

Expiry period

Lifetime

Remove from cart Add to cart Buy now

Related courses

ChipXpert e-learning: online VLSI training with hands-on EDA lab access — RTL design, physical design, DFT, verification and analog layout, taught by industry engineers.

Top categories

Help

Contact us
About us
Privacy policy
Terms and condition
Faq
Refund policy

Subscribe to our newsletter

Chat with us

PD RECORDING SESSIONS

Course description

What will i learn?

Requirements

PHYSICAL DESIGN CLASSES 37 Lessons 18:26:38.000000 Hours

ChipXpert Admin

₹90000

Lectures

37

Skill level

Beginner

Expiry period

Lifetime

Related courses

Top categories

Useful links

Help

Subscribe to our newsletter

Are you sure ?