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ACB30&33 Advanced Physical Design Course

Created by

vijay kumar

35:44:24 Hours

16 Enrolled

(0 Reviews)

English

Last updated

Wed, 02-Sep-2026

Course description

What will i learn?

Requirements

1. ASIC FLOW
01:18:23
2. Delay fundamentals part 1
01:17:16
3. Delay fundamentals part 2
01:05:23
4. Clock fundamentals
01:29:58
5. Clock types
00:00:00
6. Timing arcs and Timing variations part 1
00:00:00
7. Timing paths
01:15:48
8. Timing calculations
01:16:42
9. Setup and hold calculations 1
01:15:00
10. setup and hold calculations part 2
01:07:31
11. Inputs of PD
00:52:12
12. RTL and GLN
00:00:00
13. SDC Constraints
00:00:00
14. Library file
00:00:00
15. MMMC file
00:00:00
16. check_timing
00:00:00
17. check_design
00:00:00
18. Loading inputs
00:00:00
19. Elaborate
00:00:00
20. syn_generic
00:00:00
21. syn_map
00:00:00
22. syn opt
00:00:00
23. Generic synthesis
01:16:03
24. DFT
01:00:37
25. synthesis tool
00:54:29
26. Low power synthesis
00:00:00
27. LEF
00:00:00
28. Tech lef
00:54:33
29. UPF file
01:17:45
30. UPF part 2
01:04:45
31.DEF file
00:47:45
32. Loading PNR inputs
01:06:13
33. Floorplan terminologies
00:00:00
34. Macro Guidelines
01:09:54
35. macro placement
00:00:00
36. Physical only cells
01:11:25
37. Physical only cells -2
01:04:04
38. Static power
01:01:10
39. Dynamic power
00:00:00
40. EMIR
01:09:22
41. Adding rings
00:00:00
42. Adding stripes and rails
00:00:00
43. VCD SAIF and TWF file
00:00:00
44. Placement flow
00:00:00
45. Derate calculations and scan chain reordering
00:00:00
46. Scan chains and HFNS
00:00:00
47. Congestion fixes
00:00:00
48. Bounds
00:00:00
49. Group paths
00:00:00
50. PVT variations
00:00:00
51 . SPEC file
00:51:30
52. CTS exceptions and Useful skew
01:02:49
53. Useful skew and CPPR
00:00:00
54. Clock distribution
00:59:15
55. CTS algorithms
00:00:00
56. Cross talk
01:17:44
57. Antenna violations
00:00:00
58. Routing
01:00:15
59. LVS
00:00:00
60. LVS and DRC
00:00:00
61. Tempus
00:57:42
62. LEC
00:00:00
63. Voltus and Dtop synthesis
01:14:25
64. Dtop loading inputs to PNR
00:00:00
65. Floorplan of Dtop
00:47:17
66. Power planning and placement of Dtop
01:08:04
67. CTS Routing and DRC fixes in Dtop
01:29:05

vijay kumar

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Sahithi V

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₹90000

Lectures

67

Skill level

Beginner

Expiry period

Lifetime

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ACB30&33 Advanced Physical Design Course

Course description

What will i learn?

Requirements

Physical Design 67 Lessons 35:44:24.000000 Hours

vijay kumar

Sahithi V

₹90000

Lectures

67

Skill level

Beginner

Expiry period

Lifetime

Related courses

Top categories

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