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AC 33, 36 & 39 - Advanced VLSI PD course

Created by

Sahithi V

36:56:08 Hours

38 Enrolled

(0 Reviews)

English

Last updated

Thu, 03-Sep-2026

Course description

What will i learn?

Requirements

1.Floorplan & Powerplan
00:00:00
2.Placement CTS Routing
00:00:00

1.Introduction to Tempus
00:00:00
2.Loading Inputs
01:15:16
3.Timing Fixes
00:00:00

1. Intro to ASIC flow , PD flow , STA
01:17:42
2. PD flow & cell delays
00:00:00
3. Net delays & combinational delays
00:00:00
4. Clock fundamentals & Types of clocks
01:21:17
5. Timing paths
00:00:00
6. Timing arcs , Setup & Hold times
00:00:00
7. Setup & hold slack calculations
01:22:21
8. Setup , Hold calculations & SKEW
00:00:00
9. setup , hold slack problems & impact of skew on timing
01:11:35
10. False path , Half cycle & multi cycle paths
01:23:13
11. Uncertainity & their types
00:00:00
12. Overview of Pre-STA part1
00:00:00
13. Overview of Pre-STA part2
00:00:00
14. Introduction to PD flow , synthesis
01:12:07
15. Synthesis , types, Input files for syn - RTL , .lib
00:00:00
16. input files for synthesis - contd
00:59:50
17. Constraints - SDC file
00:00:00
18. PVT Variations , causes & affects
00:00:00
19. MMMC file & its content
01:04:19
20. PD inputs recap & Introduction to synthesis
00:00:00
21. Logic synthesis & optimization techniques
00:00:00
22 . SDC commands - clock definition, latency , uncertainity & io delays
01:11:15
23. Loading libraries, rtl files & elaborate cmds - genus tool session
01:28:10
24 . SDC constraints intro in genus
01:16:22
25. writing SDC commands
00:00:00
26. Synthesis - logic optimization techniques
00:00:00
27. Synthesis flow upto elaborate - genus tool
00:00:00
28. Synthesis flow - genus tool - generating Gate level netlist
00:00:00
29. Sanity checks - check_design , check_timing commands
01:22:01
30. report_timing cmd , analyzing timing reports
00:00:00
31.area, power , qor report cmds , mmmc file commands explanation
01:15:20
32. Brief Introduction to DFT
01:10:04
33.MMMC file commands along with switches
01:29:20
34. mmmc based synthesis flow and explanation about gui_show
01:21:50
35 . PD Test - 2 paper explanation
00:58:31
36. PVT Vs OCV , OCV , AOCV , POCV
01:14:58

37 . Introduction to pnr flow - brief explanation of each stage
00:00:00
38 . Detailed explanation - RTL , GLN , .lib files
00:00:00
39.LEF , tech lef files explanation
00:00:00
40. Floorplan - steps , macro - guidelines
01:23:40
41 . Physical only cells - well taps (latch up effect) , end caps
01:38:45
42. Detailed explanation - end caps , well tap cells
00:00:00
43. Floorplan concepts - from die , core size estimations until macro placement
00:00:00
44. Floorplan - innovus tool session -Offset creation , macro placement
01:21:29
45 . Macro placement - innovus tool session using tool box
00:00:00
46 . Macro placement , spacing between macros , halos for macros
00:58:43
47 . Floorplan - adding halos , adding end caps , well tap cells
00:00:00
48. Floorplan - innovus tool practical session
00:39:14

49. Power consumption - static , dynamic power consumption , & their minimization techniques.
00:00:00
50 . IR drop , Electromigration part -1
00:58:38
51. IR drop , EM , Power plan script
00:00:00
52. Power plan commands - explanation for adding stripes , rails
01:09:32
53. POWER PLAN CHECKS - innovus tool session
00:57:50
54. Voltage , power domains , Power management cells - power switches , isolation registers , retention registers
01:16:14
55. Clock gating , ICG cells , Level shifters
00:00:00
56. Level shifter cells - Low to high , High to low
00:00:00

Placement fixes - tool session
00:00:00
57. Placement flow part - 1
00:00:00
58 . Placement flow part -2
00:00:00
59. Congestion , hostspot , overflow in design , congestion analysis - tool session
00:00:00
60. Placement bounds
00:00:00
61. Placement checks - part 1
00:00:00
62. Placement checks - part 2
00:00:00
63. Group paths , CTS intro
00:00:00

76. Final PD session
00:28:20
64. CTS - skew , clock buffers & inverters , NDR rules
00:00:00
65. NDR rules , CTS Exceptions
01:11:59
66. CTS algorithm & distribution
00:00:00
67. CTS algorithms - H, X , pi , Fishbone tree structures
00:00:00
68. CTS - tool session
00:00:00
69. Crosstalk noise , delay
00:00:00
70 . Antenna effect
00:56:13
71. Recovery , removal checks
00:00:00
72. Routing
00:00:00
73.Routing tool session
00:00:00
74.Signoff stage
00:00:00
75.ECO , Physical verification
00:00:00

Sahithi V

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Ganesh P

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₹90000

Lectures

82

Skill level

Advanced

Expiry period

Lifetime

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